FPGA developer claims Plaion's NeoGeo AES+ is effectively a “bait and switch”

[Redaktion]

Plaion says the Neo Geo AES+, launching November 13, 2026, is a 1:1 reproduction built around newly re-engineered ASIC chips rather than emulation or an FPGA approach, with noted retro hardware specialists Jotego and Furrtek involved in development. However, FPGA developer Pramod Somashekar alleges the project could effectively be a MiSTer-derived design split into multiple ASICs, a potential "bait and switch" that could limit post-launch updates, despite the console's modern HDMI and legacy CRT-friendly outputs.

https://www.notebookcheck.net/FPGA-developer-claims-Plaion-s-NeoGeo-AES-is-effectively-a-bait-and-switch.1279381.0.html

[FPGAcat]

I would listen too much to Pramod he can't tell his arse from his elbow most of the time. It's not worth listening to him

It will be a single modern ASIC design due to costs and on a mass production scale ASIC is more cost effective compared to FPGA