It has been reported that TSMC could have a 5 nm FinFET process ready for commercial use by 2020, and the rumored Apple A14 SoC would be one of the first chips to benefit from the advanced technology. The semiconductor foundry has announced it will start risk production for 5 nm technology in the second half of this year.
https://www.notebookcheck.net/Apple-A14-SoCs-based-on-TSMC-s-5-nm-process-could-feature-in-iPhones-by-2020.410689.0.html
Judging from what we know so far the whatever Apple cook's for 5 nm TSMC FinFET with EUV won't be significantly more powerful in fact if they don't cook anything their 2018 big core's could meet sustainable power consumption target's. The TSMC 5 nm won't bring high efficiency gains about 40% compared to the current 7 nm DUV (or 20~25% compared to upcoming 7 nm EUV with denser lib). It's supposed to bring 2x density & half (or even less) price per gate, of course on the other hand designing cost will of course go up. But this is what makes it most significant. It will also be the first one to use EUV on approximately ⅓ of layers (around 15). Thing is the FinFET structures sow their end in efficiency scaling, as a matter of fact they are actually extending their expectations with anything under real 10 nm. We will see how gate all around structures will behave & Samsung is the one expected to bring them to the market first. Please for the love of God in the future don't compare anything Apple ever made to OPMA's as they will never be even close to TI.