Posted by: Vaidyanathan« on: May 27, 2020, 13:14:53 »
Most interesting to me:Nice observation. My assumption is that diagram could also possibly imply the Xe dGPU, which also has 96 EUs like the Xe Gen12 iGPU. Either that or Intel has indeed changed the schematic.
Block diagram with SoC and PCH shows external gFX connecting to the SoC, not the PCH. This is very different from every U series CPU Intel has ever made.
Could just be a misleading block diagram. Could mean PCIe lanes are now coming from the CPU, not taken from the PCH. Makes sense, since NVMe alone is capable of saturating the DMI 3.0 link. TB3 already had to be moved to the CPU die, instead of sharing with NVMe, WiFi, GPU, SD card, etc.