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Topic Summary

Posted by: Vaidyanathan
« on: May 27, 2020, 13:14:53 »

Most interesting to me:

Block diagram with SoC and PCH shows external gFX connecting to the SoC, not the PCH. This is very different from every U series CPU Intel has ever made.

Could just be a misleading block diagram. Could mean PCIe lanes are now coming from the CPU, not taken from the PCH. Makes sense, since NVMe alone is capable of saturating the DMI 3.0 link. TB3 already had to be moved to the CPU die, instead of sharing with NVMe, WiFi, GPU, SD card, etc.
Nice observation. My assumption is that diagram could also possibly imply the Xe dGPU, which also has 96 EUs like the Xe Gen12 iGPU. Either that or Intel has indeed changed the schematic.
Posted by: Vaidyanathan
« on: May 27, 2020, 13:07:07 »

That sounds all well and good, but the U series of AMD has much more cores for a smaller price. I would not go with a 4 core CPU in this day and age.

Fair enough. We hear boost clocks can go up to 4.4 GHz for the Core i5 TGL. It will be interesting to see what kind of an IPC uplift this gen brings. But yeah, AMD looks to have the edge at the moment.
Posted by: Vaidyanathan
« on: May 27, 2020, 13:05:04 »

Quote
All in all, Tiger Lake-U looks to be quite the architectural improvement that may brighten up Intel's prospects again.

architectural? i see no information about ipc, energy efficiency or moar cores. so, something architectural, but outside cpu cores.  :)

There's still time for those ;)
Posted by: william blake
« on: May 27, 2020, 12:09:08 »

Quote
All in all, Tiger Lake-U looks to be quite the architectural improvement that may brighten up Intel's prospects again.

architectural? i see no information about ipc, energy efficiency or moar cores. so, something architectural, but outside cpu cores.  :)
Posted by: jeremy
« on: May 27, 2020, 10:34:44 »

Most interesting to me:

Block diagram with SoC and PCH shows external gFX connecting to the SoC, not the PCH. This is very different from every U series CPU Intel has ever made.

Could just be a misleading block diagram. Could mean PCIe lanes are now coming from the CPU, not taken from the PCH. Makes sense, since NVMe alone is capable of saturating the DMI 3.0 link. TB3 already had to be moved to the CPU die, instead of sharing with NVMe, WiFi, GPU, SD card, etc.
Posted by: kk
« on: May 27, 2020, 10:29:38 »

That sounds all well and good, but the U series of AMD has much more cores for a smaller price. I would not go with a 4 core CPU in this day and age.
Posted by: Redaktion
« on: May 27, 2020, 09:34:54 »

Leaked slides pertaining to the multimedia capabilities of Tiger Lake-U's Gen 12 Xe GPU confirm the 2x graphics improvement we reported earlier in comparison with Ice Lake-U. The slides confirm previously reported native 12-bit HEVC and VP9 support and also shed light on changes to the power delivery architecture in Tiger Lake from Comet Lake.

https://www.notebookcheck.net/Leaked-slides-confirm-Tiger-Lake-U-Gen12-Xe-s-2x-graphics-boost-over-Ice-Lake-a-new-FIVR-implementation-and-HW-accelerated-12-bit-HEVC-VP9-encode-decode.466447.0.html

 
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